I need to be able to flag test point vias with soldermask openings too small or no opening at all. Problem is Pads design software will assign test points that have a soldermask opening smaller than the pad if the pad is of legal size. Also, often, probably due to designer error, test points are assigned to tented vias. These need to be caught somewhere before the board is fabricated and assembled. Based on the names and descriptions of some of the NPI test point checks categories it looks like this can be done. Checks like " Testpoint Exposure, Testpoint to SM, and Capped Testpoint Vias, look made just for this. I could not get good results from any of them. Like all my vias would fail Test Point Exposure whether or not if they had soldermask openings. Then the same vias would pass Testpoint SM. I am using NPI version 9.4.0 Update 1. Got any ideas?
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